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Vivado block design

The block design Tcl script is used to create the Vivado Block Design.

The block_design.tcl file is at the root of an instrument directory. When invoking a build command, Koheron SDK searches for the block_design.tcl file.

Available variables

  • $sdk_path: Koheron SDK directory root
  • $project_path: instrument directory root
  • $board_path: board directory root (as specified in the instrument configuration file)

Example

LED Blinker block_design.tcl file:

# Add PS and AXI Interconnect
set board_preset $board_path/config/board_preset.tcl

source $sdk_path/fpga/lib/starting_point.tcl
#source $sdk_path/fpga/lib/starting_point.tcl

# Add config and status registers
source $sdk_path/fpga/lib/ctl_sts.tcl
add_ctl_sts

# Connect LEDs to config register
create_bd_port -dir O -from 7 -to 0 led_o
connect_port_pin led_o [get_slice_pin [ctl_pin led] 7 0]

# Connect 42 to status register
connect_pins [get_constant_pin 42 32] [sts_pin forty_two]

Block design on Vivado GUI

$ make CONFIG=examples/red-pitaya/led-blinker/config.yml block_design

See also

[email protected]